Pre-hardware design
Design and test DSP algorithms with realistic IQ recordings before hardware captures are available, so work can start earlier.
DSP algorithms design & test
Accelerate algorithm design before hardware is ready.
RFix lets DSP engineers design and test algorithms using realistic, labeled IQ recordings from controlled RF scenes. Build the environment visually, then export repeatable data for design iterations, validation, and regression testing.
Algorithm workflow
Design and test before the lab capture exists.
Engineers can create the RF conditions they need, generate recordings at scale, and keep every design iteration tied to the graph that produced it.
Controlled impairments
Sweep channels, timing, noise, fading, offsets, and mixtures while keeping every scenario reproducible for robust testing.
Regression-ready datasets
Export labeled recordings and scenario metadata for demodulators, detectors, synchronizers, filters, and test benches.
Synthetic test benches
Known signals, known conditions, known outputs.
Use scenario graphs to generate inputs for DSP pipelines where labels, seeds, impairments, and export settings remain inspectable across runs.
DemodulatorsDetectionSynchronizationFilteringRegression tests
Evaluating options?
How RFix compares.
See RFix side by side with the tools DSP teams usually reach for.